High Bandwidth Flash Consortium Unveils New Specification for AI Memory Solutions

#What does the new specification by the High Bandwidth Flash consortium mean for AI?

The High Bandwidth Flash consortium has recently unveiled its inaugural technical specification, approximately six months after its launch in February 2026. This specification introduces a novel class of NAND-based memory aimed at resolving a critical challenge in artificial intelligence—the shortage of fast, affordable memory needed to support advanced AI models.

Key players such as Sandisk and SK Hynix lead this consortium, with Google and Tenstorrent also onboard. The primary objective is clear: to create an open standard for flash memory that can meet the demands of AI inference workloads while avoiding the prohibitive costs associated with high-bandwidth memory, commonly known as HBM.

#What performance targets does this specification set?

The initial High Bandwidth Flash specification sets ambitious targets for performance. It outlines that individual NAND stacks could deliver capacities of up to 512 GB per package, which significantly exceeds the current capabilities of HBM modules.

The proposed bandwidth spans from hundreds of GB/s for standard configurations to an impressive peak of 3 TB/s when employing UCIe, or Universal Chiplet Interconnect Express. This open standard enables efficient connectivity between chiplets within a package.

An important distinction in the development of AI models is the difference between training and inference. Training is the process through which models learn from large datasets, while inference is the application phase where the model performs tasks, such as generating images or facilitating autonomous driving. Inference represents the majority of spending in computational resources; it is predominantly characterized by a high demand for memory capacity rather than bandwidth.

#How does HBF address the memory wall problem?

The High Bandwidth Flash specification introduces a tiered memory strategy. Instead of a one-size-fits-all reliance on HBM, systems could leverage HBM for high-demand data while utilizing HBF for the larger volume of model parameters that require swift access but do not necessitate the highest speeds available.

Sandisk and SK Hynix laid the groundwork for this consortium well in advance of its formal launch. The two companies collaborated on developing high-bandwidth flash technology, formalized by a memorandum of understanding in August 2025. Additionally, an advisory board was formed in July 2025, indicating that foundational technical discussions began even earlier.

#What does the competitive landscape look like?

The High Bandwidth Flash consortium operates within a competitive framework where other companies, such as Samsung, are also pursuing high-bandwidth flash memory solutions independently. The choice made by Sandisk and SK Hynix to advocate for an open specification, in contrast to proprietary methods, reflects a strategic decision in the market.

Google's involvement in the consortium is particularly noteworthy, as it underscores the significant demand from a leading AI infrastructure provider. Tenstorrent, a hardware startup founded by prominent chip architect Jim Keller, adds another dimension. Its focus is on designing processors optimized for inference, which would stand to gain from more affordable and denser memory solutions.

#What implications does HBF have for semiconductor supply chains?

The implications of High Bandwidth Flash technology can be substantial for semiconductor supply chains. Constructing NAND flash memory fabrication plants represents a mature manufacturing process with established economics. Shifting the existing infrastructure to optimize for AI-focused memory products requires less capital investment compared to developing new high-bandwidth memory facilities, which involve complex packaging technologies and are typically limited in number across the globe.